Scor­pio News

All times in seconds, relative speed expressed as Nascom time/​NE898 time. All tests were run on my own concoction of a complete Z80 CP/M look-alike.

Standards

The NE898 departs from 80-BUS specification in a few minor details:

• The /NMI SW line is not implemented.
• Line 7 (RSFU) is used to provide the clock for the slave processor in a dual NE898 system (This is link disabled by default)
• The /RAMDIS line is not implemented (Is this significant in a memory mapping system with 20 bit addressing, and should the bus-master generate it or respond to it?)
• The /HALT line is not implemented
• INT0 and INT1 are allocated (via link block) to DMA request lines

None of these is a serious departure, although the author is accustomed to using /NMI SW and /HALT during testing and debugging of interrupt driven software. Address bit A19 is link selectable to either line 49 or line 58, thus accommodating both the MAP80 and Gemini implementations of 20 bit addressing.

Software support

At the time of writing, Newburn have almost finished an implementation of CP/M+ specifically for the NE898. This will make use of the MMU, DMA and RTC facilities, and provide support for all, the available interfaces. The price of this will be £199.

Conclusions

It might appear from my several criticisms that I am not pleased with the NE898. This is not at all the case, all the points I raise are minor inconveniences, or matters of personal preference. The new board is a very welcome upgrade to my system, providing very real benefits in. performance terms, and a richness of facilities which I intend incorporating into my operating system in the course of time.